spin lock perfer same chip core

typedef struct{
int __triger;
volatile int spin;
volatile int flags[800];
volatile int queueLast;
volatile int owner;
volatile int count;
}my_spinlock_t;

int my_spin_init(my_spinlock_t * s, void *);

void my_spin_lock(my_spinlock_t * s);

void my_spin_unlock(my_spinlock_t * s);

void my_spin_dump(my_spinlock_t * s);


#define HAS_LOCK 0
#define MUST_WAIT 1
#define BACKOFF_BASE 100000


inline int g_atomic_int_exchange_and_add (int *atomic, int val)
{
int result;
__asm__ __volatile__ ("lock; xaddl %0,%1"
: "=r" (result), "=m" (*atomic)
: "0" (val), "m" (*atomic));
return result;
}

inline int g_atomic_int_compare_and_exchange (int *atomic, int oldval, int newval)
{
int result;

__asm__ __volatile__ ("lock; cmpxchgl %2, %1"
: "=a" (result), "=m" (*atomic)
: "r" (newval), "m" (*atomic), "0" (oldval));

return result;
}

int my_gettid()
{
int * p = (int*)pthread_self();
return p[18];
}


int my_spin_init(my_spinlock_t * s, void *p)
{
s->spin = HAS_LOCK;
return 0;
}

void my_spin_lock(my_spinlock_t * s)
{
volatile int i;
int b;
int cur_id, my_id = my_gettid();
my_id = my_id%8/2+1;

while( cur_id = g_atomic_int_compare_and_exchange(&s->spin, HAS_LOCK, my_id) ){
b = BACKOFF_BASE;
if(cur_id == my_id) b=0;
while(s->spin != HAS_LOCK)
for(i=b;i;i--);
}
}

void my_spin_unlock(my_spinlock_t * s)
{
s->spin = HAS_LOCK;
}